News and Events

MEPTEC: From Chip to System. Design Challenges and Solutions

  

  

  

 delicious  

  

Today EDA companies offer a variety of co-design platforms or concurrent software selections to bridge the design gaps from silicon to package and board to system. Their platforms require more partnering with silicon and package foundries and board to system level manufacturers. Several companies now work closely with package subcontractors and systems houses to provide co-design platforms for both the front-end and back-end of design. Others offer multi-physics modeling tools for thermal, electrical and mechanical simulations, incorporating DFT and DFM solutions to reduce costs and time-to-market, while improving performance and reliability. Critical design challenges as well as solutions and resources will be covered in the symposium.

Session Chair Disruptive Design Solutions, Dave Cook, Coventor, Inc.

Architectures routinely combine MEMS, ASIC, and mixed signal technologies to form a complete end user solution. Some of the earliest MEMS enabled commercial successes such as the DLP display and ADXL 50 accelerometer required more then 10 years of development. Current time to market constraints dictate much shorter times. The industry has adopted best practices, which now shorten these timelines. Triangulation between the ideal process, target, foundry, and design specification are better understood. Utilizing a regime of DOE, test, and characterization suites are more efficient at confirming ideal architectures. Design tools are used to minimize prototyping. Device/package trade-offs are generally well understood for each market. Reuse and repurposing existing IP are always considered. This session will explore some for the best practices and emerging standards used to minimize both time and costs in qualifying a final product.