MEMS part of Cadence's EDA 360 Vision
Posted by Coventor Marketing on Thu, Oct 28, 2010 @ 06:37 AM
SAN JOSE, Calif - Coventor participated in this week’s CDN Live! event in San Jose, which brought together users of tools from Cadence Design Systems. Since Cadence offers a wide variety of tools, there were all types of IC and systems designers at the event, and we were most interested in meeting up with those custom IC and analog people who were looking for solutions for integrating MEMS into their designs.
There was a lot of interest in our MEMS+ solution which has offered hooks into the Cadence Virtuoso environment since we first introduced it last year. Since then we’ve enhanced MEMS+ with 2.0 release, which includes improved simulation performance capabilities that take advantage of Cadences Spectre and UltraSim 64-bit versions, as well as support for Spectre RF.
Connecting with Cadence is a big part of our MEMS for the Mainstream strategy. Although almost all MEMS devices are tightly integrated with electronics, either on a common silicon substrate or in the same package, MEMS design has traditionally been separated from IC design and verification. MEMS+ provides a standard methodology for modeling MEMS devices and simulating them together with control electronics within industry-standard simulation environments, like Cadence Virtuoso.
IC engineers commonly use Cadence Virtuoso to design the analog/mixed-signal electronics that accompany a MEMS device. These designers require fast and accurate models of the MEMS device in the Cadence model library. The MEMS model is then used as a component in the IC schematic to perform MEMS+IC co-simulation. The co-simulation is essential to verify the IC design and to predict yield sensitivity to manufacturing variations.
The Coventor MEMS+ tool suite’s integration with Cadence facilitates the required model exchange from the MEMS engineer to the IC designer in a far more seamless manner than previously available in the marketplace. The generation of a Cadence library cell with both a parametric simulation model and layout Pcell is almost instantaneous and doesn’t require any FEM analysis or time-consuming reduced-order modeling.
We are excited about the possibilities of MEMS+IC design enabled by our connection to Cadence, and this approach also fits very well within Cadence’s EDA 360 Vision, which was a big theme at this particular event.