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A New Platform and Structured Methodology for MEMS-IC Design

This paper won the Best Paper award at this year's Cadence Live EMEA conference in Munich, Germany. It describes a new methodology for designing MEMS devices and simulating them together with integrated electronics within the Cadence Virtuoso design environment. Using the example of Texas Instruments' digital micro-mirror device (DMD), we demonstrate how the new MEMS-IC design methodology can be applied to a mirror array, simulating multiple MEMS micro-mirrors together with their control electronics.

MEMS Mirror Array 

Content 
Introduction ...........................................................................
2 
The Traditional Approach to MEMS-IC Design ..............................2 
A New, Structured Approach to MEMS-IC Verification ....................3
DLP Mirror Array Example..........................................................3
Conclusion ............................................................................. 6 
References............................................................................. 7