MEMS Design Contest



  • Provides MEMS PDK
  • Provides mixed-signal PDK
  • Spends wafer area for manufacturing of the winner designs

Cadence Design Systems

Provides standard tools to contest participants through regular distribution channels:

  • Virtuoso® Custom Design Platform
  • Cadence® QRC Extraction
  • Cadence Physical Verification System (PVS)
  • Virtuoso Analog Design Environment


Provides tools for 3D design and simulation of MEMS on device, circuit, and system level to contest participants through regular distribution channels

  • MEMS+
  • CoventorWare

University Reutlingen

  • Formulates and organizes the call for participation
  • Academic coordination of the contest






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Related Information

  • MEMS Design Contest Overview

Video | Presentation

  • PDK Based Design Automation Enablement for MEMS and CMOS Processses

Video | Presentation

  • Coventor tools for modeling and simulation of MEMS

Video | Presentation

  • Academic MEMS Goes Fabless: The Masdar Institute Perspective

Video | Presentation

  • MEMS-ASIC Co-Design Flow


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